Revision as of 00:42, 28 December 2016

STM32 programming

Boot mode configuration

BOOT1 BOOT0 Boot mode                              Address
  x     0   Main Flash memory                      0x8000000
  0     1   System memory (built-in bootloader)    0x1FFFB000
  1     1   Embedded SRAM                          0x20000000

  in Main flash memory and System memory boot modes address is aliased to 0x0

STM32F103C86T dev board boot pins

Legend

 o o o BOOT0
 o o o BOOT1
 ---
 |R|   Reset button
 ---

Boot to bootloader (built-in bootloader)

Allows flashing over USART

 o [=]
 [=] o
 ---
 |R|
 ---

Boot to main flash (user code)

 [=] o
 o o o
 ---
 |R|
 ---

Flashing

Flashing is done via USART1 (A9 TX A10 RX)

Converting Elf to Bin

Required if you only have elf files produced by your toolchain - stm32flash accepts only *.bin files.

arm-none-eabi-objcopy -O binary miniblink.elf miniblink.bin

Using stm32flash

Test connection with

stm32flash /dev/ttyUSB0

Flash and run from 0x0

stm32flash /dev/ttyUSB0 -w miniblink.bin -g 0x0

Pinout

Libraries

libopencm3

Minimalistic firmware library/framework.

Bootstrapping on Fedora

Library

dnf install arm-none-eabi*
mkdir embedded
git clone https://github.com/libopencm3/libopencm3
cd libopencm3
# Edit TARGETS in Makefile and keep only targets that you need (or just stm32/f1 for example).
make -j8
cd ..

DFU bootloader

This is a bootloader for Device Firmware Update via USB (stm32/f1).

git clone https://git.48.io/libopencm3_dfu
cd libopencm3_dfu
# connect JTAG
make flash
# or flash via USART & stm32flash, see flashing section above
make stm32flash

Sample application

For use with DFU bootloader (stm32/f1).

git clone https://git.48.io/libopencm3_template
cd libopencm3_template
# flash via dfu
make dfu
# or with JTAG
make flash

Library examples

git clone https://github.com/libopencm3/libopencm3-examples
# Either fetch git submodule pointing to libopencm3 and repeat steps in Library section
# or symlink libopecm3 dir to previously built libopencm3
cd libopencm3-examples
rmdir libopencm3
ln -s <PATH_TO-->/libopencm3 .
# try building miniblink example
cd examples/stm32/f1/stm32-h103/miniblink
make

Troubleshooting

use make V=1 when make fails
make sure openocd is not running when doing 'make flash'

Locked device

If you can't flash and 'make V=1 flash' reports something similar

Info : Device Security Bit Set
stm32x unlocked

You need to unlock your device first (with JTAG):

openocd -f jlink_swd_f103.cfg
telnet 127.0.0.1 4444
# in telnet issue:
stm32f1x unlock 0

Debugging

https://github.com/blacksphere/blackmagic/wiki/Useful-GDB-commands

# add to Makefile to generate debuginfo
CXXFLAGS = -g

# run openocd
openocd -f jlink_swd_f103.cfg

# connect to openocd via gdb
arm-none-eabi-gdb --ex 'target remote localhost:3333' <EXECUTABLE>.elf
# Use following commands when in gdb (more at http://www.yolinux.com/TUTORIALS/GDB-Commands.html)
# c (continue), stop execution with Ctrl-C
# bt (stacktrace)
# b (break), e.g. 'b main' or 'b template.c:360'

Black Magic probe

https://github.com/blacksphere/blackmagic/wiki

Running BMP on Discovery boards

Links

DMA

http://jeelabs.org/article/1610c/

DAC

http://embedded-lab.com/blog/stm32-digital-analogue-converter-dac/

Docs

Calculating Timer Frequency

MUCH WIP

period_target_ms = p1 period_hz = p2

1000ms / p1 = p2

E.g. for 20ms (servo) period

1000ms / 20 ms = 50 hz

cpu_freq = 72Mhz prescale = 72

72MHz / 72 = 1Mhz

This increases out count register CNT by 1 000 000 each second. To calculate what is the correct value for the ARR register (which defines the period), we divide the result of the prescaled frequency by the intended frequency for our period:

1 000 000 Hz / 50 Hz = 20 000

Now every time the CNT register is increased by one, this is the equivalent to 1us. The duty cycle now could by set easily. E.g. for a 1.5ms duty cycle we set the CCRx register to 1500.

Stepper

driver_max_duty = 250khz

From http://www.kaltpost.de/?page_id=412

@@ Line 4: / Line 4: @@
 {{cmd|code=
-BOOT0 BOOT1 Boot mode                              Address
+BOOT1 BOOT0 Boot mode                              Address
    x     0   Main Flash memory                      0x8000000
      1   System memory (built-in bootloader)    0x1FFFB000
@@ Line 22: / Line 22: @@
   <nowiki>
+ o o o BOOT0
   o o o BOOT1
- o o o BOOT0
   ---
   |R|   Reset button
@@ Line 192: / Line 192: @@
 === Docs ===
 * [http://www.st.com/content/ccc/resource/technical/document/user_manual/8a/56/97/63/8d/56/41/73/DM00063382.pdf/files/DM00063382.pdf/jcr:content/translations/en.DM00063382.pdf STM32 F3 Discovery (STM32F303VC) Manual]
+* [http://www.st.com/content/ccc/resource/technical/document/datasheet/f2/1f/e1/41/ef/59/4d/50/DM00058181.pdf/files/DM00058181.pdf/jcr:content/translations/en.DM00058181.pdf STM32F303VC]
+* [http://www.mouser.com/ds/2/389/stm32f334k4-956319.pdf STM32F334]
+* [http://www.st.com/content/ccc/resource/technical/document/application_note/31/14/f4/9d/d3/8f/48/2b/DM00070391.pdf/files/DM00070391.pdf/jcr:content/translations/en.DM00070391.pdf Getting started with STM32F3 series]
+* [http://www.st.com/content/ccc/resource/technical/document/application_note/8e/c8/8d/e3/ee/ff/44/e6/DM00073522.pdf/files/DM00073522.pdf/jcr:content/translations/en.DM00073522.pdf Migrating from F1 to F3 series]
 = Calculating Timer Frequency =